picprojects.net Forum

PICPgm USB Programmer
Page 2 of 2

Author:  vijay1307 [ Wed Jan 04, 2017 4:29 pm ]
Post subject:  Re: PICPgm USB Programmer

Hi Christian

Thanks for schematic i will try in today and one more thing i am working on 2 devices in parallel one is dsPIC30F4013 and PIC16F887 can i use the same hardware http://picpgm.picprojects.net/hardware/picpgm_usb_v1.0.pdf because as per the data sheet there is no Low voltage programming for dspic30F4013 should i have to drive the MCLR pin to a minimum of 9V pls let me know if so which schematic should i have to use

Author:  vijay1307 [ Thu Jan 05, 2017 6:37 am ]
Post subject:  Re: PICPgm USB Programmer

i have given the screen shot of what i am getting for PIC16F887 i have connected the PGM PIN with a pull down resistor of 1k

the below is the image i am attaching pls let me know what might be the problem

pgm.jpg [ 63.64 KiB | Viewed 5405 times ]

Author:  WN2A [ Sun Dec 10, 2017 5:22 pm ]
Post subject:  Re: PICPgm USB Programmer

This may be slightly off-topic, but as it relates to the PICPgm USB Programmer, so I might as well ask it here.

1) I am planning to build the PICPgm USB Programmer with the FT245BL chip per the design. But could I substitute an ACT Inverter like 74ACT240 for the 74LS14? Just wondering why a Schmitt Trigger? No problem should we need it.

2) Christian, I think you mentioned that the USB Programmer is slow on read (due to the nature of USB ). I was wondering just how slow? I plan to use PIC16F628A (4K Flash) and similar chips, so a rough estimate would be appreciated. I am not doing production programming--just hobby.

My plans are to use this on Puppy Linux (Slacko 6.3.2). The PICPgm USB Programmer will make for a good transition to USB programming on Linux, after years of using IC-Prog with JDM.

Thanks, WN2A

Author:  WN2A [ Wed Dec 27, 2017 6:42 am ]
Post subject:  Re: PICPgm USB Programmer

Just a follow up item on the PICPgm Programmer:

Seems like there would have been contention on reading back from the device (at SV1-pin 4 Data)
if it wasn't for the fact that LS (not HC or ACT,etc) was specified. As it turns out, LS series logic output structure normally is comprised of a 110 ohm pull-up resistor and a NPN Darlington transistor with Schottky Diode clamps. This arrangement allows a person to program logic '0' to the input of any 74LS14 gate, and the output would look like a pull-up for the data coming back at SV1-pin 4. To use something like 74AC14 may cause contention as the drive is too strong.

Christian, is that why the LS was specified (Pretty Clever!)

Page 2 of 2 All times are UTC
Powered by phpBB © 2000, 2002, 2005, 2007 phpBB Group